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Self Resetting Scheme for Terminated Josephson Junction Circuits

IP.com Disclosure Number: IPCOM000080865D
Original Publication Date: 1974-Feb-01
Included in the Prior Art Database: 2005-Feb-27
Document File: 2 page(s) / 29K

Publishing Venue

IBM

Related People

Fang, F: AUTHOR [+2]

Abstract

In the terminated Josephson junction circuit, latching to V not = 0 state is usually accompanied by the junction switching from V = 0 state. This action is mainly due to the capacitance associated with the junction. In actual logic operation, it is often desirable that the junction be returned to the V = 0 state after the control signal is off. Without this feature, the junction has to be reset by reducing the gate current supply to below I(min) momentarily. In the circuit shown herein, an approach is shown which automatically resets the junction to the V = 0 state when the control signal is turned off.

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Self Resetting Scheme for Terminated Josephson Junction Circuits

In the terminated Josephson junction circuit, latching to V not = 0 state is usually accompanied by the junction switching from V = 0 state. This action is mainly due to the capacitance associated with the junction. In actual logic operation, it is often desirable that the junction be returned to the V = 0 state after the control signal is off. Without this feature, the junction has to be reset by reducing the gate current supply to below I(min) momentarily. In the circuit shown herein, an approach is shown which automatically resets the junction to the V = 0 state when the control signal is turned off.

The approach involves an antiparallel, in-line controlled tunneling cryotron shown schematically as the junction J1 in Fig. 1, which has a gate current I(g) flowing therethrough in a direction shown by the arrow. A control winding 1 has a current I(c) flowing through winding 1 in a direction opposite to the gate current I(g) When the junction J1 is switched to the V not = 0 state by the presence of I(c) flowing in winding 1, a portion of the gate current I(g), indicated in Fig. 1 as I(o), is switched to loop 2 which is terminated by resistance R. Current I(o) = 2 delta/R where 2 delta is the gap voltage. The junction J1 is latched at the V = 2 delta state and the I-V relationships are as represented in Fig. 2 by curve A. Junction J1 is switched to the 2 delta state, due to the presence of control cur...