Browse Prior Art Database

Image Sensor Electrode Layout

IP.com Disclosure Number: IPCOM000080910D
Original Publication Date: 1974-Mar-01
Included in the Prior Art Database: 2005-Feb-27
Document File: 2 page(s) / 30K

Publishing Venue

IBM

Related People

Soychak, FJ: AUTHOR [+2]

Abstract

This electrode layout technique eliminates variations in light sensitivity and image smearing in very large sensing arrays, particularly when two-phase bucket brigade sensing circuits are used.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 92% of the total text.

Page 1 of 2

Image Sensor Electrode Layout

This electrode layout technique eliminates variations in light sensitivity and image smearing in very large sensing arrays, particularly when two-phase bucket brigade sensing circuits are used.

Fig. 1 is a schematic representation of a semiconductor wafer 10 having a large image scanning integrated circuit on its surface. The array circuit comprises a plurality of step and repeat processed images of identical single-segment electrode patterns 12. A step and repeat process is necessary to form the mask for the large continuous array, as electrode pattern tolerances cannot be maintained for the entire array by utilizing one single-segment mask pattern for the entire array.

Fig. 2 is an enlarged view of the phase electrode patterns for two adjacent patterns 12-2 and 12-3. Instead of utilizing a conventional electrode layout (phase 1, phase 2, phase 1, phase 2, etc.), this layout uses phase 1, phase 2, phase 2, phase 1, etc., to eliminate the undesirable light-sensitive strip between adjacent electrodes. In addition, in order to eliminate the presence of a light- sensitive strip between electrode segments 12-2 and 12-3, each segment begins and ends with the same phase electrode such that the metal lines are continuous between segment boundaries 14. By utilizing opaque metal electrode lines and by sensing images presented to the top of the wafer, the only light-sensitive region exposed is region 16 between phase lines as defined by the cl...