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Exclusive or Circuit (XOR)

IP.com Disclosure Number: IPCOM000080964D
Original Publication Date: 1974-Mar-01
Included in the Prior Art Database: 2005-Feb-27
Document File: 2 page(s) / 34K

Publishing Venue

IBM

Related People

Gaudenzi, GJ: AUTHOR

Abstract

Fig. 1 shows a position exclusive OR circuit (XOR). Fig. 2 shows a negative exclusive OR circuit.

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Exclusive or Circuit (XOR)

Fig. 1 shows a position exclusive OR circuit (XOR). Fig. 2 shows a negative exclusive OR circuit.

Referring to Fig. 1, when signals A and B are at the same level, T2 and T3 remain off, causing T5 to turn on. Hence, the output F is at a down level "0". When A > B, T2 conducts. When B > A, T3 conducts. The conduction of either T2 or T3 causes T5 to go into cutoff, and the output F to assume the up level "1".

The circuits of Figs. 1 and 2 are transistor-transistor logic (TTL) compatible. However, because of the nature of the down level, Schottky diodes S1, S2 are employed.

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