Browse Prior Art Database

AC Fault Simulator

IP.com Disclosure Number: IPCOM000081145D
Original Publication Date: 1974-Apr-01
Included in the Prior Art Database: 2005-Feb-27
Document File: 2 page(s) / 62K

Publishing Venue

IBM

Related People

Carpenter, RG: AUTHOR [+5]

Abstract

The technique depicted by the flow chart is used to determine the effectiveness of a set of AC patterns, to detect AC failures in a large-scale integrated (LSI) logic structure.

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AC Fault Simulator

The technique depicted by the flow chart is used to determine the effectiveness of a set of AC patterns, to detect AC failures in a large-scale integrated (LSI) logic structure.

1. Assume that an AC failure will cause a logic circuit to switch slower than normal - for the purposes of illustration, an AC failure will cause a circuit to switch in double the normal time.

2. Fur each circuit in the logic structure calculate and assign the appropriate turn on and turn off times using the technology delay equation.

3. Apply to an input of the logic structure a logical transition and simulate the effect of the transition through the logic structure. If any output of the logic structure changes state as a result of applying the input transition, a potential AC test will result. The simulator will calculate when any of the outputs change state with reference to the applied input transition. At this step in the procedure, all of the necessary information is present to perform an AC test of the actual product containing the simulated logic structure. It is unknown, however, what AC failures, if any, will be detected with the application of the test.

4. Set up a logic structure in the simulator, identical to the one simulated in Step 3, except that one circuit will have a turn on and turn off value double that calculated from the technology delay equation. Repeat Step 3 on this newly defined logic structure. If any output changes state at a later time than...