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High Input Impedance Receiver Circuit

IP.com Disclosure Number: IPCOM000081148D
Original Publication Date: 1974-Apr-01
Included in the Prior Art Database: 2005-Feb-27
Document File: 2 page(s) / 30K

Publishing Venue

IBM

Related People

Klara, WS: AUTHOR [+3]

Abstract

This receiver circuit accepts an input level swing of -0.8 to -2.0 volts and provides "inphase" and "out-of-phase" outputs having a level swing of ground to -1.3v. Where the input of the receiver circuit is coupled via a transmission line to an emitter-follower driver, the receiver with its high impedance and low capacitance reduces reflection.

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High Input Impedance Receiver Circuit

This receiver circuit accepts an input level swing of -0.8 to -2.0 volts and provides "inphase" and "out-of-phase" outputs having a level swing of ground to - 1.3v. Where the input of the receiver circuit is coupled via a transmission line to an emitter-follower driver, the receiver with its high impedance and low capacitance reduces reflection.

Input transistors T1, T2 and reference transistor T3, in conjunction with resistors R1, R3 and R4, form a current switch. The output of each phase of the current switch is connected to an inverter circuit, T5 with R2, and T4 with R5, respectively. The receiver outputs provide a collector driving function for T2L internal circuits. Saturation prone transistors have Schottky barrier diodes connected across their collector-base junctions.

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