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Elimination of Threshold Voltage Shift Due to Avalanche Injection in High Performance Field Effect Transistors

IP.com Disclosure Number: IPCOM000081154D
Original Publication Date: 1974-Apr-01
Included in the Prior Art Database: 2005-Feb-27
Document File: 2 page(s) / 29K

Publishing Venue

IBM

Related People

Bhatia, HS: AUTHOR [+3]

Abstract

High-performance field-effect transistors exhibit instability of threshold voltage (Vt), because of the injection of hot electrons from the drain-depletion region to traps in the gate dielectric. By providing additional collision centers in the silicon substrate, the mean free path of the electrons can be reduced to eliminate the problem.

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Elimination of Threshold Voltage Shift Due to Avalanche Injection in High Performance Field Effect Transistors

High-performance field-effect transistors exhibit instability of threshold voltage (Vt), because of the injection of hot electrons from the drain-depletion region to traps in the gate dielectric. By providing additional collision centers in the silicon substrate, the mean free path of the electrons can be reduced to eliminate the problem.

Referring to the figure, the field-effect transistor is formed in a P-type silicon substrate 1 with a drain region 2 surrounded by a drain-depletion region 3, a source region 4 and a channel region disposed between drain 2 and source 4. A silicon dioxide layer 6 is disposed above the channel region. If the electrons accelerated in depletion region 3 achieve 3 - 4 ev of kinetic energy, there is a probability that they will surmount the oxide-silicon energy barrier and become trapped in dielectric 6. This causes Vt shift.

By introducing an appropriate metal such as nickel or gold into substrate 1, the electron mean free path is reduced, thereby preventing the migration of electrons. For example, gold or nickel deposited on the back side of substrate 1 and sintered prior to contact hole opening is a preferred technique.

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