Browse Prior Art Database

Lead Indium for Joining a Semiconductor Chip to a Substrate

IP.com Disclosure Number: IPCOM000081157D
Original Publication Date: 1974-Apr-01
Included in the Prior Art Database: 2005-Feb-27
Document File: 2 page(s) / 46K

Publishing Venue

IBM

Related People

Goldman, LS: AUTHOR [+4]

Abstract

The drawings, Figs. A, B, C, D, show semiconductor chips 1 joined to a substrate 2 by a lead-indium solder joint 4. The method for positioning and joining microminiature semiconductor components to a supporting dielectric substrate 2 involves providing an electrically conductive pattern, which has a terminal metallurgy 5 that is wettable to lead-indium solder 4.

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Lead Indium for Joining a Semiconductor Chip to a Substrate

The drawings, Figs. A, B, C, D, show semiconductor chips 1 joined to a substrate 2 by a lead-indium solder joint 4. The method for positioning and joining microminiature semiconductor components to a supporting dielectric substrate 2 involves providing an electrically conductive pattern, which has a terminal metallurgy 5 that is wettable to lead-indium solder 4.

Suitable terminal metals include pure elements Cu, Ni, Pd, Au, etc. and alloys AgPd, AgPdAu, AuPd, AuNi, etc., and may be pretinned with solder (PbIn, PbSn, Sn, etc.) for added joinability or shelf life. Suitable substrates include, but are not limited to Al(2)O(3) with conventional silk-screened metallurgy, Fig. A, Al(2)O(3) with thin film metallurgy, Fig. B, multilayer ceramic with metal vias 7, Fig. C, Si carriers with conventional Si chip metallurgy and terminals, Fig. D.

In the case of controlled collapse connections, the terminal area must be isolated by a surrounding region which is nonwettable by the PbIn solder. Suitable materials are glass 6 as in Fig. A, chromium 8 as in Fig. B, ceramic as in Fig. C, and SiO(2) 10, in Fig. D.

The semiconductor chip 1, having its conductive pads which are to be joined to the substrate 2, is then positioned onto the preselected connecting terminals 5 of the substrate 2. The structure is then heated to the appropriate temperature and for a time sufficient to melt the PbIn solder 4 and fuse the chip 1 to t...