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Analog Switch Driver

IP.com Disclosure Number: IPCOM000081174D
Original Publication Date: 1974-Apr-01
Included in the Prior Art Database: 2005-Feb-27
Document File: 2 page(s) / 31K

Publishing Venue

IBM

Related People

Bansal, JP: AUTHOR

Abstract

This circuit generates a digital pulse to drive one or more P-channel or N-channel field-effect transistors (FETs) used for multiplexing and demultiplexing digital or analog signals of positive and negative polarity. Input signals are compatible with T/2/L logic levels.

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Analog Switch Driver

This circuit generates a digital pulse to drive one or more P-channel or N- channel field-effect transistors (FETs) used for multiplexing and demultiplexing digital or analog signals of positive and negative polarity. Input signals are compatible with T/2/L logic levels.

The figure shows a driver adapted for NAND operation. A and B input signal requirements are 0.8 volt most positive down level and 2.0 volts least positive up level. When either A or B to T1 is down, the base-emitter junction of T1 is forward biased with practically zero collector current. T2 is turned off and T3 is also turned off. T3 is formed as a lateral PNP in an integrated circuit. T4 and T5 are also off and the output voltage level will be equal to V(CC)-R5.I(Load).

When both A and B to T1 are at an up level, the emitter-base junctions of T1 are reverse biased and the base-collector junction is forward biased. T2, T3, T4 and T5 are turned on. The output voltage will be a down level equal to -(V(EE)- V(BE)-V(CE)). The output voltage swing is limited by the collector-to-base breakdown voltage BV(CBO) of T5 and T4. The requirements are that BV(CBO) of TS > (V(CC)+V(EE)) and BV(CBO) of T4 > V(CC).

The current gain of lateral PNP transistor T3 is not critical. T4 will amplify the collector current of T3 and will supply enough base current to turn on T5. The tolerances of resistors R5 and R4 is not critical. Values of R5 and R4 will be selected for a compromise between circui...