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Improved Performance Computer System

IP.com Disclosure Number: IPCOM000081213D
Original Publication Date: 1974-Apr-01
Included in the Prior Art Database: 2005-Feb-27
Document File: 2 page(s) / 47K

Publishing Venue

IBM

Related People

Berglund, NC: AUTHOR

Abstract

The internal performance of a central processing unit (CPU) in a computer system is improved by modifying the system, whereby operands of certain classes of instructions are operated upon two bytes rather than one byte at a time. A performance improvement is realized if the operands for instructions of these classes are aligned on even byte boundaries. The operands of other classes of instructions can be aligned on odd byte boundaries.

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Improved Performance Computer System

The internal performance of a central processing unit (CPU) in a computer system is improved by modifying the system, whereby operands of certain classes of instructions are operated upon two bytes rather than one byte at a time. A performance improvement is realized if the operands for instructions of these classes are aligned on even byte boundaries. The operands of other classes of instructions can be aligned on odd byte boundaries.

A computer system such as the IBM System/3, described in the 5410 Processing Unit Theory of Operation Manual, Form No. SY31-0207-2, Copyrighted 1969, 1970, 1971, is modified to include half-word control logic 70. This logic analyzes the operand addresses as an instruction is being fetched on instruction (I) cycles, to determine if both addresses start on an even byte boundary. If they do, then half-word mode is enabled for ensuing execution (E) cycles. If not, the instruction is executed whereby one byte is operated upon for each E cycle.

When the half-word mode is enabled, control logic 70 conditions storage 10 to pass a half-word (2 bytes) on each EA and EB cycle. The fetched half-word is stored in storage data register 20, which has been expanded to accommodate the half-word. In this instance, the length count is decremented by two instead of one. This is accomplished by setting a factor into A register 45, which is based upon the half-word mode and the current value of the length count. The...