Browse Prior Art Database

Double Buffered Communications Adaptor

IP.com Disclosure Number: IPCOM000081216D
Original Publication Date: 1974-Apr-01
Included in the Prior Art Database: 2005-Feb-27
Document File: 3 page(s) / 89K

Publishing Venue

IBM

Related People

Houdek, ME: AUTHOR

Abstract

Fig. 1 illustrates the data flow for a transmit operation. The microprogrammed control unit 10 (MPU) gives commands to disk adaptor 11 to read a record. Data is then read from the disk and passed directly to disk buffer 12, and thereafter the MPU moves the data from disk buffer 12 to one of the transmit buffers 13 or 14. MPU 10 then commands that another record be read from the disk, which is transferred to the transmit buffer. This sequence of reading and transferring records to the transmit buffer continues until the transmit buffer is full.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 52% of the total text.

Page 1 of 3

Double Buffered Communications Adaptor

Fig. 1 illustrates the data flow for a transmit operation.

The microprogrammed control unit 10 (MPU) gives commands to disk adaptor 11 to read a record. Data is then read from the disk and passed directly to disk buffer 12, and thereafter the MPU moves the data from disk buffer 12 to one of the transmit buffers 13 or 14.

MPU 10 then commands that another record be read from the disk, which is transferred to the transmit buffer. This sequence of reading and transferring records to the transmit buffer continues until the transmit buffer is full.

MPU 10 transfers the one byte of data from the transmit buffer to the BSC data register 16 and turns "on" the data ready signal. If buffer register A is empty and the data ready signal on line 23 is "on", the Binary Synchronous Communication (BSC) control logic 18 transfers the byte in the BSC data register to buffer register A and turns "off" the data ready signal. MPU 10 senses that the data ready signal is "off" and can now transfer another byte from the transmit buffer to the BSC data register 16.

If buffer register B is empty and buffer register A contains a byte of data, BSC control logic 18 transfers the byte in buffer register A to buffer register B. Similarly, if buffer register C is empty and buffer register B contains the byte of data, BSC control logic 18 transfers the byte in buffer register B to the buffer register C. And finally, if the serializer 20 is empty, BSC control logic 18 transfers the byte in the buffer register C to serializer 20, whereby the serializer 20 serializes the data for transmission on a communications line.

While data is being transmitted from one of the transmit buffers, data is read from disk and packed into the other transmit buffer in an overlapped operation. When this operation is complete (that is one transmit buffer has been completely transmitted, and the other transmit buffer has been completely filled with records read from the disk), the buffers are swapped so that data from the transmit buffer just filled is transmitted, and the transmit buffer from which data has just been transmitted is filled with new records read from the disk. Thus, the use of two transmit buffers allows the overlap of transmitting data bytes and the reading of data records from the disk.

Since MPU 10 is faster at transferring data bytes from the transmit buffer to BSC data register 16 then serializer 20 can serialize the data, MPU 10 tends to fill up BSC data register 16 and the three buffer registers A, B and C. Thus, an infrequent MPU operation can take up to the time it takes to serialize four data bytes, before the MPU is required to transfer more data bytes from the transmit buffer to BSC data register 16. The infrequent operation in this particular case, is setting up the disk commands to read the next record from disk.

Fig. 2 shows the flow chart o...