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Browse Prior Art Database

Precision Modulation Technique

IP.com Disclosure Number: IPCOM000081287D
Original Publication Date: 1974-May-01
Included in the Prior Art Database: 2005-Feb-27
Document File: 3 page(s) / 77K

Publishing Venue

IBM

Related People

Schulz, RA: AUTHOR

Abstract

A modulation technique particularly useful for implementing time-shared digital-to-synchro (or resolver) converters, eliminates the need to include separate expensive digital-to-analog converters for each output channel.

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Precision Modulation Technique

A modulation technique particularly useful for implementing time-shared digital-to-synchro (or resolver) converters, eliminates the need to include separate expensive digital-to-analog converters for each output channel.

Digital information in the form of sin 8 followed by cos theta indicating synchro output, i.e., desired shaft angle theta, is fed to the data input terminals 2/0/, 2/1/, ... 2/n/(Fig. 1) of single precision digital-to-analog converter (DAC) 10. Resultant output signal Edc is commonly fed to sine and cosine C subchannels of each channel 1, 2 ... N and stored in the appropriate sample-and-hold circuit (SHC) 11 of each subchannel.

The output of each SHC goes to an associated modulator (e.g., 12 of 1Cs) configured as a four-bit precision current-switching network, having input operational amplifier 13 and a bank 14 of eight parallel compensating diodes in its feedback path. The output of amplifier 13 is commonly connected to binary weighted resistors R, 2R, 4R, 8R of a four-bit current-switching network that includes drivers 1, 2, 3, 4 and current-switching diode banks 21 to 24, and an additional leg with weighted resistor 8R', driver 5, and diode bank 25. Output operational amplifier 15 and capacitor 16 in its feedback path integrate the output signal level,of SHC 11, modified by timing signals applied to gate inputs 2/0'/, 2/1'/, 2/2'/, 2/3'/, 2/3"/ of respective TYL or DTL gates of drivers 1 to 5 (e.g., TTL
17). This combination of weighted resistors allows the generation of + or - Imax, as in Fig. 2, when drivers 1 to 5 are properly selected (Imax = Edc/R).

In operation, timing control signals synchronized with the energization frequency f (e.g., 400 Hz) that excite the synchro(s) are selected to control drivers 1 to 5....