Browse Prior Art Database

Conditional End Microorder Technique

IP.com Disclosure Number: IPCOM000081289D
Original Publication Date: 1974-May-01
Included in the Prior Art Database: 2005-Feb-27
Document File: 4 page(s) / 109K

Publishing Venue

IBM

Related People

Phillips, BR: AUTHOR

Abstract

This technique is used to optimize the microprogrammed sequences that make up the "macro" instructions in a computer.

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Conditional End Microorder Technique

This technique is used to optimize the microprogrammed sequences that make up the "macro" instructions in a computer.

In a microprogrammed machine, the ability to vary the sequence, i.e., make decision branches, of microword execution is essential. The usual technique for doing this is to construct the next microword that controls modification of the "basic next address" (also totally or partially specified by a microword field) as a function of environmental condition, data-flow contents, etc.

The number of these fields contained in the microword specifies the decision making capacity of the microword. Thus, the larger the number of microword fields for next address modification, the greater the decision making capacity.

Another constraint on the microwords structure is encountered when high- performance macro execution is desired. This necessitates short microword sequences for implementing the macro instructions. Consequently, the microword must be structured to maximize control over simultaneous operations within the computer.

When these two constraints - maximize decision capacity and maximize parallel control - are weighed against the economic requirements to keep the size of the microword reasonable, the resulting structure is usually limited to two or three address modification fields.

However, at the end of a macro there are usually a number of status conditions that must be determined before the current macro instruction can be terminated and the next instruction started.

Typically, the above number of "macro-end" decisions will cause longer microword sequences and thus reduce performance.

The present condition-end microorder technique, however, provides an increased decision capacity at macro end, thereby resulting in short microword sequences and therefore higher performance. It solves the problem of increasing macro performance, without increasing the number of address modifications fields in the microword.

The microword symbolism illustrated in Fig. 1 graphically represents the macro-end decisions for a particular example. In this particular example, a floating-point instruction is being executed and at the end of the arithmetic operations, the following decisions must be made before the next-prefetched instruction can be started: 1) Has an exponent overflow occurred?

2) Has an exponent underflow occurred?

3) Has a zero fractional result been generated?

4) Is an interrupt pending?

5) Is the next instruction a short format type?

6) Is the next instruction a long format type?

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