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Relocation Recovery Indicators for Emulator Microcode

IP.com Disclosure Number: IPCOM000081368D
Original Publication Date: 1974-May-01
Included in the Prior Art Database: 2005-Feb-27
Document File: 2 page(s) / 36K

Publishing Venue

IBM

Related People

Poland, TA: AUTHOR

Abstract

Microcode was designed to be interruptible before or during any instruction emulation in a virtual storage environment.

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Relocation Recovery Indicators for Emulator Microcode

Microcode was designed to be interruptible before or during any instruction emulation in a virtual storage environment.

No checks are made to determine availability of pages prior to instruction execution. Instead, each time a unit of storage data (e.g., word or doubleword) is altered, the remaining count is saved in a general purpose register as a checkpoint. If an attempt is made to alter an invalid page, the previously checkpointed length is used when resuming the instruction-execution in its midst after the page has been brought into storage. In addition, checkpointing is needed for instruction retry after hardware errors, so the technique works for both types of microcode interrupts. A delayed mode of interruption is also allowed for exceptions, such as I/O interrupts pending after any emulated instruction execution completes.

To allow resuming the instruction after an interrupt where instruction execution can modify the instruction itself, certain initial values are saved during initial instruction fetch (see diagram).

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As instruction execution proceeds, microcode stores the remaining length count, LR, each successive time a storage unit is altered. Assuming a right to left execution, a page fault will occur in the first operand data field after several storage units have been altered (as shown by the invalid page in the diagram).

The invalid page interrupt causes the page fault supervisor...