Browse Prior Art Database

# Mapping to Symmetrically Extend the Exponent Range of Floating Point Arithmetic

IP.com Disclosure Number: IPCOM000081416D
Original Publication Date: 1974-Jun-01
Included in the Prior Art Database: 2005-Feb-28
Document File: 3 page(s) / 75K

IBM

## Related People

Murray, WA: AUTHOR [+3]

## Abstract

It is generally desirable to extend the arithmetic exponent range in the internal computation of floating-point computer instructions, which perform inner product and sum and product reduction. Such an extension should also preserve the "symmetry" of the exponent range. The following algorithm illustrated as a means of doubling the exponent range of IBM S/360-370 hexadecimal arithmetic, can easily be extended to other "excess" floating-point representations and higher multiples of exponent range.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 57% of the total text.

Page 1 of 3

Mapping to Symmetrically Extend the Exponent Range of Floating Point Arithmetic

It is generally desirable to extend the arithmetic exponent range in the internal computation of floating-point computer instructions, which perform inner product and sum and product reduction. Such an extension should also preserve the "symmetry" of the exponent range. The following algorithm illustrated as a means of doubling the exponent range of IBM S/360-370 hexadecimal arithmetic, can easily be extended to other "excess" floating-point representations and higher multiples of exponent range.

The algorithm is convenient for implemenation in hardware and offers convenient tests for exception handling in both the extended exponent range of the intermediate computation, and also for the final "standard" exponent range of the completed result.

Let, s, s' denote the sign bit of the input operand and completed result, respectively.

x denote an arbitrary bit value, 1 or 0.

b, c denote a specific bit value, 1 or 0.

b denote the complement of b.
I. Conversion from "Excess 64" to Excess 128''

Case 1, Suppose the value of the leading bit of the exponent is 1, i.e., the exponent lies in the range of 0 to +63.

Then the value represented by the bits in bit position

numbers 2 to 7 is the "excess", which must be mapped into

the extended range as the excess over 128. This is easily

accomplished in the arithmetic unit by utilizing the sign

bit position, which must be stripped-off to determine the

algebraic sign of the result. In this case, the leading 1

bit is directed to the vacated sign position and a 0

value is forced in the bit position number 1.

Case 2, If the value of the leading bit of the exponent is 0, i.e. the exponent lies in the range -64 to -1. Then again 64

must be added to the value represented by bit numbers 2

to 7. Again this is easily accomplished by directing the

leading bit (in this case a 0) to the vacated sign

position and here forcing a 1 value in bit position

number 1.

Obviously in either of the above cases, the required mapping is simply the addition of 64 to the original exponent value. The purpose of the above illustrations is to show that this "addition" may be simply implemented, by directing the leading bit of the original exponent into the vacated sign position and forcing its complement into bit position number 1. Exception handling during the intermediate computation is identical to the normal case for "Excess 6...