Browse Prior Art Database

Miniprocessor

IP.com Disclosure Number: IPCOM000081562D
Original Publication Date: 1974-Jun-01
Included in the Prior Art Database: 2005-Feb-28
Document File: 2 page(s) / 39K

Publishing Venue

IBM

Related People

Bengds, EE: AUTHOR [+4]

Abstract

The miniprocessor is a stored program processor, in which the data path contains four bits and the instruction word is 16-bits long. The addressing method permits 16,384 bytes of memory to be accommodated (a byte is equivalent to 4 bits of memory). No arithmetic logic unit is provided, since all such functions are achieved through the use of table look-up programming techniques. The processor is capable of directly executing only 6 instructions by hardware; load indirect, store indirect, branch, branch on zero, input and output.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 65% of the total text.

Page 1 of 2

Miniprocessor

The miniprocessor is a stored program processor, in which the data path contains four bits and the instruction word is 16-bits long. The addressing method permits 16,384 bytes of memory to be accommodated (a byte is equivalent to 4 bits of memory). No arithmetic logic unit is provided, since all such functions are achieved through the use of table look-up programming techniques. The processor is capable of directly executing only 6 instructions by hardware; load indirect, store indirect, branch, branch on zero, input and output.

In the load indirect instruction, the address formed points to a location in memory 10 and the contents of the location fetched by the address are loaded into the accumulator 12.

In the store indirect instruction, after an address is formed, the data at that address is replaced by the contents of the accumulator.

In the branch, if zero instruction, the instruction counter 14 contents are replaced with the address bits specified in the instruction, provided the accumulator 12 bits are all zero.

The input instruction is an extension of the "load indirect" instruction. The address thus formed points to a location in memory 10. The contents of the accumulator 12 are replaced by a four-bit value from the addressed input device. For each input device address there is a corresponding address in memory. That particular memory address is rendered unavailable to the system.

The output instruction is an extension of the store indirect...