Browse Prior Art Database

Software Invocation Interface for Hardware Features

IP.com Disclosure Number: IPCOM000081592D
Original Publication Date: 1974-Jul-01
Included in the Prior Art Database: 2005-Feb-28
Document File: 3 page(s) / 42K

Publishing Venue

IBM

Related People

Fischbeck, HW: AUTHOR

Abstract

A growth facility can be incorporated in the addressing architecture of a computer system to permit a new dimension in open-endedness and hardware-software trade offs. This can be done by utilizing the same addressing format for data, programming code, and hardware features.

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Software Invocation Interface for Hardware Features

A growth facility can be incorporated in the addressing architecture of a computer system to permit a new dimension in open-endedness and hardware- software trade offs. This can be done by utilizing the same addressing format for data, programming code, and hardware features.

Thus, for example, the instruction for branching to a module of code which performs a function would be identical to the instruction for branching to a hardware feature, which could be substituted for the module of code if desired.

The basic avenue of interface to a processor is its instruction set. If additional function is desired, it must be programmed in software as an application or incorporated using the instruction interface and support. Extension by selective incorporation of a software function into hardware or microcode in an interface compatible with normal software invocation provides tremendous flexibility. Among the advantages are: A. It provides the mechanism to implement performance or

security features belatedly identified, as required.

B. It allows hardware-software trade offs to be made flexible

across a line o~ processors.

C. It minimizes the problems encountered with new instruction

definition and justification in such areas as:

1) The Cost/Value Paradox, e.g., large machines,

because of their architecture, gain less in

performance but incur more hardware costs

compared to smaller microcoded processors.

2) The finite OP code set argument, e.g., a specific size

OP code field can only accommodate a fixed number of

OP codes.

3) Instruction decode performance impacts resulting from

new OP codes.

D. It defines a consistent interface which permits

hardware-software trade offs for functions on a continuing

basis as they are justified.

This support requires identification of hardware features in the same addressing format as software modules or data. This permits a consistent invocation interface regardless of implementation. The hardware, in decoding the operand address, recognizes the feature identifier and invokes the internal support instead of passing control to a software module (see the flow chart).

The facility could be limited to a specific invocation instruction to provide a basic support, or could be extended to operands in any approp...