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High Speed Parity Checking Algorithm Disclosure Number: IPCOM000081734D
Original Publication Date: 1974-Jul-01
Included in the Prior Art Database: 2005-Feb-28
Document File: 1 page(s) / 12K

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An algorithm is described to check for either even or odd parity in a variable-length bit string having a known maximum length.

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High Speed Parity Checking Algorithm

An algorithm is described to check for either even or odd parity in a variable- length bit string having a known maximum length.

For a bit string of length N, the algorithm consists of 2N+2 instructions and the number of instructions executed is 1+ (1 for each bit tested).

The algorithm is shown coded in IBM System 370-135 microprogram and assumes that a data byte is in W0.0. EXAMPLE 1

LABEL TO-LABEL LABEL TO-LABEL A0 B1 BNZ)W0.0.0 B0 A1 BNZ)W0.0.0 Al B2 BNZ)W0.0.1 B1 A2 BNZ)W0.0.1 A2 B3 BNZ)W0.0.2 B2 A3 BNZ)W0.0.2 A3 B4 BNZ)W0.0.3 B3 A4 BNZ)W0.0.3 A4 B5 BNZ)W0.0.4 B4 A5 BNZ)W0.0.4 A5 B6 BNZ)W0.0.5 B5 A6 BNZ)W0.0.5 A6 B7 BNZ)W0.0.6 B6 A7 BNZ)W0.0.6 A7 OK BNZ)W0.0.7 B7 ERROR BNZ)W0.0.7 ERROR BR) OK BR)

ERROR:- Incorrect Parity

OK :- Correct Parity.

If it is necessary to test all 8 bits of this byte for parity (as would be the case when testing for odd parity on a byte of 8 bits plus a parity bit equal to 0), then enter at A0. If even parity is desired (parity bit is equal to 1) then enter at B0.

If, for example, only 5 bits are to be tested then enter at A3 or B3.

A simple extension of this algorithm to, for example, 3 sequences, indicate whether the number of bits "on" of those inspected was of the form:- 3n, 3n+1, 3n+2 as indicated in Example 2.


A0 B1 BNZ)W0.0.0 B0 C1 BNZ)W0.0.0 C0 A1 BNZ)W0.0.0 Ai Bi+1 BNZ)W0.0.i Bi Ci+1 BNZ)W0.0.i Ci Ai+1 BNZ)W0.0.i A7 Y BNZ)W0.0.7 B7 Z BNZ)W0.0.7 C7 X BNZ)W0.0.7 X BR) Y BR) Z BR)...