Browse Prior Art Database

Faster Display with Half Index

IP.com Disclosure Number: IPCOM000081771D
Original Publication Date: 1974-Aug-01
Included in the Prior Art Database: 2005-Feb-28
Document File: 3 page(s) / 44K

Publishing Venue

IBM

Related People

Schomburg, RR: AUTHOR [+2]

Abstract

A page memory 10 stores codes in memory cells 11 which for a given page are ordered according to individual print locations on the page. Cells 11 are addressed by a row-by-row control register 12 and, when addressed, present their contained code to a font address and escapement table 13. The information from table 13 is processed by a control 14 to select a bit pattern from font memory 15, to be presented through serializer 16 for controlling an individual dot pattern synchronized with a vertical display raster.

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Faster Display with Half Index

A page memory 10 stores codes in memory cells 11 which for a given page are ordered according to individual print locations on the page. Cells 11 are addressed by a row-by-row control register 12 and, when addressed, present their contained code to a font address and escapement table 13. The information from table 13 is processed by a control 14 to select a bit pattern from font memory 15, to be presented through serializer 16 for controlling an individual dot pattern synchronized with a vertical display raster.

Half-index is accomplished through the use of a "change index" code shown as * which is stored in a page memory cell 11, in the same manner as character codes are stored. The "change index" code is stored at a location in memory 10, so as to be accessed during the scan that immediately precedes a desired change from full to half-index or vice versa.

The "change index" code, when accessed during a scan, causes a flag bit to be written (or a previously written flag bit to be erased) in the index status field of the page memory access cell 17 of page memory address controller 12, that corresponds to the particular writing line row in which the "change index" code was detected. During the same scan, the font memory 15 is controlled to print white space only, and the associated cell 17 of page memory address controller 12 is updated to call for the next memory cell 11 within the row during the immediately subsequent scan.

When, during the subsequent scan, controller 12 presents the address in the thus flagged address cell 17, control 14 causes the insertion of a measured number of white dots prior to displaying the character selected from the addressed memory cell, according to the following sequence. Normal fetch of bit patterns from font memory 15 is divided into two subscans identified as "1" and "0" corresponding to the...