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Meggett Encoder With Simplified Combinatorial Logic

IP.com Disclosure Number: IPCOM000081782D
Original Publication Date: 1974-Aug-01
Included in the Prior Art Database: 2005-Feb-28
Document File: 2 page(s) / 31K

Publishing Venue

IBM

Related People

Hartmann, CR: AUTHOR [+3]

Abstract

In a Meggett encoder, an n-bit message to be decoded is sifted through a feedback shift register 2, and a syndrome appears in the stages of the feedback shift-register and can be interpreted as an error in a particular position of the message. The message is simultaneously shifted through an n-bit buffer so that it appears one bit at a time at the buffer output.

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Meggett Encoder With Simplified Combinatorial Logic

In a Meggett encoder, an n-bit message to be decoded is sifted through a feedback shift register 2, and a syndrome appears in the stages of the feedback shift-register and can be interpreted as an error in a particular position of the message. The message is simultaneously shifted through an n-bit buffer so that it appears one bit at a time at the buffer output.

A combinatorial logic circuit 3 is connected to the stages of the feedback shift register 2 to detect an error in the bit that appears with the output of the buffer, and a bit that is in error is inverted by an exclusive OR circuit 5 to produce the corrected word on a line 4.

In such a decoder the combinatorial logic is very complex. For example a Golay (23, 12) code has one syndrome indicating a single error, 22 syndromes indicating a double error, and 231 syndromes indicating a triple error. The combinatorial logic 3 responds to any one of these 254 syndromes to correct a bit at the output of the buffer.

In the decoder of the drawing gate A applies the corrected output of the buffer to the buffer input, and the buffer contents shift circularly during the decoding operation. A gate B is closed as the received word is shifted twice through the buffer and gate A. Gate B is opened on a third shift to produce the corrected word on line 4.

The combinatorial logic is arranged to correct at least one error as the n-bit received word is shifted once through the...