Browse Prior Art Database

Fast Write Search CAM Cell

IP.com Disclosure Number: IPCOM000081875D
Original Publication Date: 1974-Aug-01
Included in the Prior Art Database: 2005-Feb-28
Document File: 2 page(s) / 32K

Publishing Venue

IBM

Related People

Kelly, HJ: AUTHOR

Abstract

The drawing depicts the circuit of a cell for use in a monolithically fabricated Content Addressable Memory (CAM) or associative memory. Use of the cell facilitates fast WRITE and SEARCH operations. The SEARCH operation is performed by lowering one of the bit lines.

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Fast Write Search CAM Cell

The drawing depicts the circuit of a cell for use in a monolithically fabricated Content Addressable Memory (CAM) or associative memory. Use of the cell facilitates fast WRITE and SEARCH operations. The SEARCH operation is performed by lowering one of the bit lines.

To understand the SEARCH operation, assume node A is high and node B is low. If the left bit line is lowered in potential, transistor T3 will turn on and the MATCH line will lower in potential indicating a mismatch. If the right bit line had been lowered, transistor T4 would not have had enough Vbe to turn on and the MATCH line would have remained at ground potential indicating a MATCH.

To WRITE and SWITCH the cell, the left bit line is lowered in potential and the WORD line is simultaneously raised in potential. The Schottky diodes S1 and S2, are biased so that the diode connected to the low node (S2 in this case) is biased at the edge of conduction. When the WORD line is raised in potential, node B rises in potential at the same rate as the WORD line, but node A charges up with the slower time constant of the circuit. Thus in the WRITE SWITCHING operation, T1 turns on at the beginning of the operation and switches the cell before T3 has time to turn on.

cell achieves fast SEARCH capability, by eliminating the resistances between the emitters of transistors T3 and T4 and the bit lines required to perform the READ operation. The cell achieves fast WRITE capability by having...