Browse Prior Art Database

Maximizing One Zero Discrimination in Superconducting Memory Loops Using Josephson Devices

IP.com Disclosure Number: IPCOM000081877D
Original Publication Date: 1974-Aug-01
Included in the Prior Art Database: 2005-Feb-28
Document File: 2 page(s) / 37K

Publishing Venue

IBM

Related People

Terlep, KD: AUTHOR

Abstract

Fig. 1 illustrates a technique which may be used with Josephson devices in superconducting memory loops, to increase the difference between 1 and 0 stored circulating currents. For the example shown, it is desired to steer the input current, Io, completely to the right branch yielding I1=0 and I2=Io.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 57% of the total text.

Page 1 of 2

Maximizing One Zero Discrimination in Superconducting Memory Loops Using Josephson Devices

Fig. 1 illustrates a technique which may be used with Josephson devices in superconducting memory loops, to increase the difference between 1 and 0 stored circulating currents. For the example shown, it is desired to steer the input current, Io, completely to the right branch yielding I1=0 and I2=Io.

In practice without the coupling technique shown, current transferred is not Io but is Io-Imin, where Imin is usually small due to the large hysteresis associated with the device's I-V characteristic. As device and circuit design dimensions decrease, as well as current control levels, the device's hysteresis which is quite dependent upon circuit environment, may be decreased significantly.

If a 1 is written into the cell, actual circulating current magnitude is Io/2 - Imin as compared to the ideal value of Io/2. If a 0 is defined as zero current and if Imin is appreciable in magnitude with respect to Io/2, then 1 - 0 discrimination within the cell is impacted appreciably at cell read time. These values of 1 and 0 are defined as those circulating currents within the superconducting cell, after all write currents are removed.

The approach shown in Fig. 1 provides a compensating persistent current due to flux trapping from control current, Ix, required for X-Y cell select. The superconducting line with current Ix is positioned with respect to the memory loop, to ensure net flux tr...