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Read Only Storage Bit Precharge/Sense Circuit

IP.com Disclosure Number: IPCOM000081961D
Original Publication Date: 1974-Sep-01
Included in the Prior Art Database: 2005-Feb-28
Document File: 2 page(s) / 37K

Publishing Venue

IBM

Related People

Cordaro, W: AUTHOR

Abstract

A read-only storage (ROS) sense circuit is designed to supply its own precharge current. The circuit is illustrated in Fig. 1. The capacitors on the bit line are precharged through transistors T1 and T2 to a voltage, VH-VTP, where VTP is the threshold voltage of T1.

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Read Only Storage Bit Precharge/Sense Circuit

A read-only storage (ROS) sense circuit is designed to supply its own precharge current. The circuit is illustrated in Fig. 1. The capacitors on the bit line are precharged through transistors T1 and T2 to a voltage, VH-VTP, where VTP is the threshold voltage of T1.

If transistor TB is not present, the bit line is kept charged so that transistor T3 conducts, but T1 does not. When the read enable signal goes to VH, T4 conducts and hence the output goes to ground. If transistor TB is present (i.e., the gate is personalized), the word line WL will cause TB to conduct and discharge the bit line to some value less than VH/2. The low voltage in the bit line will cause T1 to conduct and also T3 to stop conducting, so that the output will remain at VH.

This circuit will exhibit generally the response shown in the timing chart of Fig. 2. Time is required for the circuit to be precharged; during this time the address is not valid.

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