Browse Prior Art Database

Dynamic Transistor Antisaturation Control

IP.com Disclosure Number: IPCOM000081986D
Original Publication Date: 1974-Sep-01
Included in the Prior Art Database: 2005-Feb-28
Document File: 2 page(s) / 32K

Publishing Venue

IBM

Related People

Knickmeyer, KH: AUTHOR

Abstract

The saturation voltage of a transistor increases with collector current, primarily due to the bulk collector resistance. Some well-known antisaturation techniques result in excessive on-dissipation. Consequently, power switching transistors are usually operated in the saturated mode which requires maximum on and off drive power, and matching or compensation of transistor and diode storage times. This results in slower fall time than that encountered with the same device operating as a slightly class A switch, hence, higher turnoff losses and exposure to second breakdown effects.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 65% of the total text.

Page 1 of 2

Dynamic Transistor Antisaturation Control

The saturation voltage of a transistor increases with collector current, primarily due to the bulk collector resistance. Some well-known antisaturation techniques result in excessive on-dissipation. Consequently, power switching transistors are usually operated in the saturated mode which requires maximum on and off drive power, and matching or compensation of transistor and diode storage times. This results in slower fall time than that encountered with the same device operating as a slightly class A switch, hence, higher turnoff losses and exposure to second breakdown effects.

The illustrated circuit for transistor Q provides a dynamic control of VCE, clamping it to a level just above VCE saturation at any collector current encountered. By controlling VCE as a function of collector current, the on- dissipation of the unsaturated device is minimized, on and off drive is minimized, and the attendant reduction in turnoff time is maximized.

The collector current is sensed by a suitable sensor, i.e., current transformer, magnetoresistive sensor, hall sensor, resistor, etc. This sensor output is then conditioned by sense amplifier A1 to provide an output proportional to IC. This signal may be further conditioned in A1 to make EO - VBE + K + ICRC where: VBE is the power transistor terminal VBE in the on state; K is the operating V desired above VCE saturation + compensation for fixed drops such as D1; IC is collector current,...