Browse Prior Art Database

Protection of System Storage

IP.com Disclosure Number: IPCOM000082034D
Original Publication Date: 1974-Sep-01
Included in the Prior Art Database: 2005-Feb-28
Document File: 2 page(s) / 51K

Publishing Venue

IBM

Related People

Kerr, JW: AUTHOR

Abstract

Main storage in a computer system is protected against unintentional modification of data therein resulting from a programming error. In some computer systems, the programmer has access to the storage area for storing the normal storage protect key. To guard against any inadvertent modification of data in main storage, two sources for storage protection keys are provided. One of the storage protection keys which is set at initial microprogram load (IMPL) time cannot be accessed by the user program. The source of the storage protect key is selected by the setting of a mode latch at IMPL time.

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Protection of System Storage

Main storage in a computer system is protected against unintentional modification of data therein resulting from a programming error. In some computer systems, the programmer has access to the storage area for storing the normal storage protect key. To guard against any inadvertent modification of data in main storage, two sources for storage protection keys are provided. One of the storage protection keys which is set at initial microprogram load (IMPL) time cannot be accessed by the user program. The source of the storage protect key is selected by the setting of a mode latch at IMPL time.

In Fig. 1, the I/O address registers 25 located in CPU 20 are properly loaded under program control. The particular I/O address register 25 used during an I/O operation is selected by an I/O register pointer 55 located in data store 50, which is transferred to register 26 via channel adapter 30 and data buffer 27.

I/O register pointer 55 is analogous to a storage protect key, as it selects a particular I/O address register which has been properly loaded to address a permissible area of main storage 10. However, if the user is permitted to program IOC 45, for example, to obtain improved responsiveness in event driven applications (sensor based), a programming error could modify an I/O register pointer 55. This would cause the wrong I/O address register 25 to be selected and thus the wrong word in main storage 10 would be read or written.

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