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Metal Oxide Semiconductor Field Effect Transistor Structure

IP.com Disclosure Number: IPCOM000082050D
Original Publication Date: 1974-Sep-01
Included in the Prior Art Database: 2005-Feb-28
Document File: 2 page(s) / 50K

Publishing Venue

IBM

Related People

Young, DR: AUTHOR

Abstract

N-channel metal-oxide semiconductor field-effect transistor (MOSFET) technology utilizes a substrate doping level of around 2.5x10/16//cc, as opposed to 2x10/15/ for p-channel devices. This is essential to the process, due to the need for using the substrate effect to provide a positive threshold voltage. Otherwise the device would be in the conducting state even for a zero gate voltage. The use of this "high" doping level results in a relatively large capacity between the source or drain and the substrate. One means of reducing this effect is to use silicon on insulator (sapphire) technology which reduces the junction area to that corresponding to the sidewalls alone, as shown in Fig. 1.

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Metal Oxide Semiconductor Field Effect Transistor Structure

N-channel metal-oxide semiconductor field-effect transistor (MOSFET) technology utilizes a substrate doping level of around 2.5x10/16//cc, as opposed to 2x10/15/ for p-channel devices. This is essential to the process, due to the need for using the substrate effect to provide a positive threshold voltage. Otherwise the device would be in the conducting state even for a zero gate voltage. The use of this "high" doping level results in a relatively large capacity between the source or drain and the substrate. One means of reducing this effect is to use silicon on insulator (sapphire) technology which reduces the junction area to that corresponding to the sidewalls alone, as shown in Fig. 1.

Difficulties arising from the use of this technology are associated with the need for insulating substrates with ultrahigh purities (requirements not met by state of the art technologies), and with the difficulties arising that are associated with the growth of high-quality silicon films on foreign substrates, even though the substrates are chosen to match silicon as closely as possible.

In the following, a structure is proposed that can be made in silicon and yet has the major advantages of the silicon on sapphire technology. The proposed structure is shown in Fig. 2.

The p/-/ regions 1 which surround source 2 and drain 3 are disposed in a silicon substrate 4 and provide a relatively low capacity. They can be formed by...