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Dielectric Isolation of Silicon Regions

IP.com Disclosure Number: IPCOM000082116D
Original Publication Date: 1974-Oct-01
Included in the Prior Art Database: 2005-Feb-28
Document File: 2 page(s) / 58K

Publishing Venue

IBM

Related People

Poponiak, MR: AUTHOR [+3]

Abstract

This process, utilizing anodization of selected regions followed by oxidation of the resultant porous silicon, produces complete isolation of monocrystalline regions supported on a semiconductor substrate.

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Dielectric Isolation of Silicon Regions

This process, utilizing anodization of selected regions followed by oxidation of the resultant porous silicon, produces complete isolation of monocrystalline regions supported on a semiconductor substrate.

In this process a P-type layer 10 having a concentration in the range of 10/16/ to 10/19/ atoms/cc is formed on the substrate 12 by ion implantation, or a blanket diffusion, as indicated in Fig. 1. The layer 10 has a lower resistivity than the supporting substrate 12 which is also doped with a P- type impurity.

As indicated in Fig. 2, a grid configuration of P+ regions 14 and N+ regions 15 is formed on the surface of substrate 12 by conventional masking and diffusion, or ion implantation techniques. The concentration of the P+ type impurity in regions 14 should be on the order of 10/19/ to 10/20/ atoms/cc. Regions 14 preferably extend through blanket layer 10, as indicated in Fig. 2, While regions 15 are completely enclosed within layer 10.

An N epi layer 16 is deposited on the surface of substrate 12 by conventional deposition techniques. During the growing of layer 16, there will be an upward, outward diffusion of regions 14 and 15 into layer 16 as indicated in Fig. 3. A thin layer 18 of Si(3)N(4) or SiO(2) is deposited on the surface of epi layer 16 as indicated in Fig. 4.

Using photolithographic techniques and subtractive etching, a grid configuration of openings 20 is formed in layer 18 which overlies regions 14 now ...