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Digital to Analog Converter for Low Level PCM Signals

IP.com Disclosure Number: IPCOM000082164D
Original Publication Date: 1974-Oct-01
Included in the Prior Art Database: 2005-Feb-28
Document File: 2 page(s) / 61K

Publishing Venue

IBM

Related People

Maddens, F: AUTHOR [+2]

Abstract

Present digital-to-analog converters exhibit a poor precision for low level PCM signals, due to the position of zero level in the middle of the converter range. Table I shows the usual range of a three-bit converter, and it appears that around zero level a one-step switching from 0 1 1 to 1 0 0 involves modification of all three bits of the PCM word. This results in cumulating precision errors for low-level signals, thereby reducing signal-to-noise ratio.

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Digital to Analog Converter for Low Level PCM Signals

Present digital-to-analog converters exhibit a poor precision for low level PCM signals, due to the position of zero level in the middle of the converter range. Table I shows the usual range of a three-bit converter, and it appears that around zero level a one-step switching from 0 1 1 to 1 0 0 involves modification of all three bits of the PCM word. This results in cumulating precision errors for low-level signals, thereby reducing signal-to-noise ratio.

The proposed converter makes use of an increased number of current sources per input bit so as to eliminate this drawback. A three-bit converter is shown on the drawing. B1 , B2 and B3 are the three bit inputs from the most to the least significant bit. These three inputs are logically combined by AND INVERT (AI), INVERT (I) and AND (A) logical circuits, to provide five signals B1 B2 , B1 . B2 , B1 B3, B1 . B3, and B1, respectively. These signals drive respective transistor switches T1 through T5 having the same collector load +E and acting as current sources. Resulting currents are summed at node S through classical weighting resistors R and 2R.

Operational amplifier OP AMP has a direct-current loop role only: it maintains the current summation node S at a true zero volt level. However, to reduce the adverse effect of the collector-emitter saturation voltage of transistor switches T1 through T5, the positive input of OP AMP is connected to the collector of t...