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Variable Gain Amplifier

IP.com Disclosure Number: IPCOM000082218D
Original Publication Date: 1974-Oct-01
Included in the Prior Art Database: 2005-Feb-28
Document File: 2 page(s) / 31K

Publishing Venue

IBM

Related People

Commander, RD: AUTHOR [+2]

Abstract

The figure shows half of a differential-in and differential-out variable-gain amplifier. The other half through which the opposite phase of the differential signal passes is the mirror image of that shown.

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Variable Gain Amplifier

The figure shows half of a differential-in and differential-out variable-gain amplifier. The other half through which the opposite phase of the differential signal passes is the mirror image of that shown.

Vin, one phase of the differential input signal whose amplitude is to be modulated by the automatic gain control (AGC) loop, is applied to the base of translator T1 which has a bias current supplied by the current source including transistor T8. The input voltage Vin modulates the emitter and collector current of transistor T1, by an amount dependent on the value of resistor R3. Transistor T1 is connected in the common-emitter path of transistors T2 and T3 which have their bases, respectively, connected to a reference voltage VR and a control voltage VC.

The collector current of transistor T1 is divided between transistors T3 and T2 in a ratio dependent on their different base voltages VC - VR. Hence some fraction of the modulated current through transistor T1 appears across resistor R1. The R1 standing current is also reduced to the same fraction, and bias compensation is used to avoid large variations of standing current with control voltage which gives large common-mode signals, which are further converted by mismatches to differential mode. The bias compensation is performed by summing transistor T3 bias current back into resistor R1.

Resistor R4, its mirror image, and capacitor C remove differential components of the signal from tra...