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System for Computer Design

IP.com Disclosure Number: IPCOM000082226D
Original Publication Date: 1974-Oct-01
Included in the Prior Art Database: 2005-Feb-28
Document File: 3 page(s) / 38K

Publishing Venue

IBM

Related People

Halliwell, H: AUTHOR [+2]

Abstract

A system for computer design (SCD) is described herein which is an ensemble of programs for the design of logic. It's features include a high-level description of designs, verification of designs, automatic production of an implementation, and the generation of tests for failures with 100% coverage. The overall structure of SCD is illustrated in the figure. The following paragraphs describe its individual parts.

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System for Computer Design

A system for computer design (SCD) is described herein which is an ensemble of programs for the design of logic. It's features include a high-level description of designs, verification of designs, automatic production of an implementation, and the generation of tests for failures with 100% coverage. The overall structure of SCD is illustrated in the figure. The following paragraphs describe its individual parts.

It is assumed that the design of a computer is prescribed by a high-level, algorithmic notation, called PL/R. Algorithms written in this way are called, R- algorithms. PL/R, a compatible (i.e., proper) subset of PL/I, is specified. PL/I's GOTO statements and RECURSIVE procedures are disallowed. PL/R is presently restricted to only those operations relevant to algorithmic or logic design.

PL/R as a subset of PL/I is suitable for processing by existing PL/I compilers. An R-algorithm can thus be checked, using the diagnostic features of PL/I; furthermore, the executing program may be interpreted using PL/I interpreter or compiled, to execute the program, giving thus a simulation of the design.

The R-transformer is a program which accepts an R-algorithm and produces a particular form of logic design, called an R-design. This is in the design specification stage.

The R-design form is an organization or method of a design, with the location of registers in appropriate places plus timing pulses such that races and hazards are eliminated. It may be technology-independent. This form of design has been used before: on the IBM System 360/40, justifying economy, and on the IBM System 370/195, justifying speed.

R-VERIFY/(2)/ is an algorithm, a derivative of the D-algorithm, which ascertains whether or not two R-designs are equivalent functionally, up to all sequences of inputs of some prescribed length s or less. The output of the program is either a statement that the two R-designs are functionally equivalent, or else an input sequence with the corresponding output sequences for each design wherein they differ. VERIFY consists essentially of the CONSISTENCY subalgorithm of the D-algorithm, without the complication of the "D's" and "D's".

It is simple to prove/(3,4)/ that the D-algorithm can compute a test for any testable failure in an R-design. The method of design, R-design, completely eliminates races and hazards, except such as are local to the individual latches and easily avoidable. Thus, the iterative model is a faithful model of the behavior of the design itself.

The Mu -transformer produces a microcode implementation from an R- design. This transformer awaits development in the R-transformer...