Browse Prior Art Database

Square Wave Generator

IP.com Disclosure Number: IPCOM000082298D
Original Publication Date: 1974-Nov-01
Included in the Prior Art Database: 2005-Feb-28
Document File: 2 page(s) / 40K

Publishing Venue

IBM

Related People

Grange, JC: AUTHOR [+2]

Abstract

Shown in Fig. la is a square-wave generator built by arranging two basic configurations comprising a comparing circuit 1 fed by a sawtooth generator output signal.

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Square Wave Generator

Shown in Fig. la is a square-wave generator built by arranging two basic configurations comprising a comparing circuit 1 fed by a sawtooth generator output signal.

Transistors Q1 and Q2 are initially off and the output of comparator A2 is at logic level 0. Capacitor C charges through resistor R until voltage Vc is equal to V(3) = V (R(4) + R(5)) / (R(3) + R(4) + R(5)).

As soon as Vc reaches the V3 level, comparator A2 output becomes 1. The voltage at the output of inverter N causes transistors Q1 and Q2 to saturate. Consequently capacitor C is discharged through path resistor r (because r is small with respect to R) until level V1 = VR4/(R4 + R3) is reached. Resistor R5 is shorted through saturated transistor Q2.

Comparator A1, the threshold level of which is V2 = VR2/(R1+R2), is adjusted between V1 and V3 and provides a square wave Vs derived from the sawtooth signal Vc, as shown on Fig. 1b.

By selecting the values of threshold voltages V1, V2 and V3 it is possible to vary the square-wave characteristics.

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