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Digital Frequency Shift Key Demodulator

IP.com Disclosure Number: IPCOM000082340D
Original Publication Date: 1974-Nov-01
Included in the Prior Art Database: 2005-Feb-28
Document File: 6 page(s) / 251K

Publishing Venue

IBM

Related People

Dwire, JD: AUTHOR [+2]

Abstract

This frequency shift key demodulator is of a digital type and substantially reduces cost, circuitry and power requirements as compared to its analog counterpart. The digital demodulator detects incoming line signals by a digital differentiator 20 (Fig. 2) which converts an incoming square-wave train to a series of narrow pulses, one pulse for each zero crossing of the carrier. Demodulation is then performed in a two-step process - detection and reconstruction.

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Digital Frequency Shift Key Demodulator

This frequency shift key demodulator is of a digital type and substantially reduces cost, circuitry and power requirements as compared to its analog counterpart. The digital demodulator detects incoming line signals by a digital differentiator 20 (Fig. 2) which converts an incoming square-wave train to a series of narrow pulses, one pulse for each zero crossing of the carrier. Demodulation is then performed in a two-step process - detection and reconstruction.

Frequency shift key demodulators have historically been implemented using analog circuits as frequency detectors. Recently, much interest has been given to transversal digital filters to perform the demodulation function. This technique requires a very large number of digital circuits and, therefore, is not economically competitive with the existing analog detectors for low-speed (0 to 1200 bps) modems.

Fig. 1 shows a typical frequency shift key modem system and signal waveforms at key points in the system. The system includes basically a transmitter 34 and a receiver 36. The modulator of the transmitter 34 is typically a voltage-controlled multivibrator 38, which assures continuous phase of the transmitted signal from transmitter 34 when shifting between two different, mark and space frequencies. Since the output of multivibrator 38 on line 24 is a square wave, filters 40 are added to contain the transmitted spectrum within the channel bandwidth of transmission line 26.

At the receiver 36, the signal from the line 26 is amplified and limited by amplifier and limiter circuitry 42 to remove amplitude distortions (analog frequency detectors are sensitive to amplitude variations). Typically, the limited signal is fed to a pair of tuned circuits 44 and 46 (one tuned to the mark frequency and the other tuned to the space frequency) which acting in a push- pull fashion, produce a net detected output (on line 30) which varies linearly with frequency. This signal is fed to a threshold detector 48 which reproduces the transmitted data.

Frequency shift key receivers use hard limiting to minimize the effects of amplitude fluctuations. Thus, it is apparent that all of the information must be contained in the zero crossings of the signal. Therefore, an effective frequency discriminator may be made by measuring the time between zero crossings of the input signal.

Consider a frequency shift key system using a mark (binary "1") frequency of 1300 Hz and a space (binary "0") frequency of 2100 Hz. When the transmitter is in the mark condition, zero crossings will occur every 384 microseconds and when in a space condition, every 238 micro-seconds. Since the data and carrier are asynchronous, the zero crossing times associated with a mark/space or space/mark data transition may assume any value between 238 and 384 microseconds. That value is uniquely determined by the phase of the carrier when the data transition occurs. For example, if a space/mark data t...