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Differential Sense Amplifier

IP.com Disclosure Number: IPCOM000082375D
Original Publication Date: 1974-Nov-01
Included in the Prior Art Database: 2005-Feb-28
Document File: 2 page(s) / 28K

Publishing Venue

IBM

Related People

Spampinato, DP: AUTHOR

Abstract

A charge transfer sensing scheme for the stored charge memory cell as shown in the figure is proposed, which eliminates the pulsing of the charge transfer device O2 and provides the necessary reference level for setting a latch without the use of dummy cells.

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Differential Sense Amplifier

A charge transfer sensing scheme for the stored charge memory cell as shown in the figure is proposed, which eliminates the pulsing of the charge transfer device O2 and provides the necessary reference level for setting a latch without the use of dummy cells.

Assume that the field effect transistors (FETs) utilized are N-channel, enhancement mode devices. A reasonable design for capacitor C1 is to have its capacitance equal to the node stray capacitance C2. Also, the total node capacitance (C1 + C2) is twice the memory cell storage capacitance CS.

The circuit operation starts by activating devices Q1, which precharges the latch input nodes NL, NR and the bit/sense B/S lines. Each B/S line charges until device Q2 almost cuts off. Assume the B/S line potential to be 5 volts. Devices Q1 are then turned off.

A word line WL is now accessed along with activating the V(BL) and V(BR) lines. Assume the word line WL is associated with the left segment of the B/S line, thereby requiring that the V(BL) line receive a full-select potential and the V(BR) line a half-select potential, or whatever voltage necessary to set the proper reference level. This depends on the capacitance ratio of C1 and C2. (If the word line is associated with the right segment then the V(BR) line would receive the full select and the V(BL) line the half select). For this situation, a full select of 5 volts is used and 2.5 volts for the half select.

If nodes NL and NR were initially precharged to 5.5 volts their potential rises (by capacitor voltage division)...