Dismiss
There will be a system update on Tuesday, January 16th, 8 PM ET. You may experience a brief service interruption.
Browse Prior Art Database

# JK Latch using Capacitor Store

IP.com Disclosure Number: IPCOM000082389D
Original Publication Date: 1974-Nov-01
Included in the Prior Art Database: 2005-Feb-28
Document File: 2 page(s) / 39K

IBM

## Related People

Schuster, SE: AUTHOR

## Abstract

A practical flip-flop circuit can exhibit and maintain a given binary state. It can also be switched from one state to the other, and its state can be reversed. One particular type of flip-flop known as the JK is finding fairly wide usage as a storage element in array logic chips. The JK flip-flop has two inputs j and k as shown in Fig. 1. The statements I). A (t+ delta t) = K (t)-A(t) + j (t-A (t) II). A (t+ delta t) = K (t)-A (t) + j (t)-A (t) define the flip-flop operation. When no input is applied the state of the flip-flop remains unchanged. When an input is applied to j, the flip-flop is switched to the 1 state. When an input is applied to k, the flip-flop is switched to the 0 state. When inputs are applied to both j and k, the flip-flop switches to its complement state.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 52% of the total text.

Page 1 of 2

JK Latch using Capacitor Store

A practical flip-flop circuit can exhibit and maintain a given binary state. It can also be switched from one state to the other, and its state can be reversed. One particular type of flip-flop known as the JK is finding fairly wide usage as a storage element in array logic chips. The JK flip-flop has two inputs j and k as shown in Fig. 1. The statements I). A (t+ delta t) = K (t)-A(t) + j (t-A (t) II). A (t+ delta t) = K (t)-A (t) + j (t)-A (t) define the flip-flop operation. When no input is applied the state of the flip-flop remains unchanged. When an input is applied to j, the flip-flop is switched to the 1 state. When an input is applied to k, the flip- flop is switched to the 0 state. When inputs are applied to both j and k, the flip- flop switches to its complement state.

The number of devices (i.e., area) required for implementing the latch and its performance are important considerations. It is felt that the circuit of Fig. 2 achieves both density and performance, by making use of capacitor storage and some new circuit techniques. The circuit consists of essentially three parts; a latch comprised of devices 11 through 15, devices 1 through 5 which perform the logical AND/OR function on the inputs which define the flip-flop's state, and the switching or transfer devices 6 through 10. The circuit operates in the following manner: 1) Assume inputs are applied to both j and k (i.e., k is a zero) and the A side of the latch is high. 2) With the arrival of phi 1, devices 6,7,8, and 9 turn on. Since J and A are high, nodes (5) and (7) go high turning on devices 2 and 4 and pulling nodes (5) and (7) go high turning on devices capacitor storage the voltage levels on nodes (5) (6) (7) and (8) remain. 3) Next phi 3 f...