Browse Prior Art Database

Program Tracing

IP.com Disclosure Number: IPCOM000082410D
Original Publication Date: 1974-Dec-01
Included in the Prior Art Database: 2005-Feb-28
Document File: 3 page(s) / 53K

Publishing Venue

IBM

Related People

Ryle, JJ: AUTHOR

Abstract

In an online processor, the working memory may be completely required for online processes. External processes are controlled via a bus-out set of circuits similar to an I/O channel in present-day processors. Because of the reliability requirements of the system in which the on-line processor resides, a back-up processor is provided. System function tracing is performed by interaction between the online processor and the back-up processor.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 53% of the total text.

Page 1 of 3

Program Tracing

In an online processor, the working memory may be completely required for online processes. External processes are controlled via a bus-out set of circuits similar to an I/O channel in present-day processors. Because of the reliability requirements of the system in which the on-line processor resides, a back-up processor is provided. System function tracing is performed by interaction between the online processor and the back-up processor.

The instruction address register IAR of the online processor is connected to a hold register which, in turn, is connected to a small store for selective transfer to a trace area in the store of the back-up processor. In the online processor, an E- word (force branch between microroutines) decode facilitates tracing routines being executed by the online processor. A realtime aspect of the tracing function is provided by the E-word decode supplying a control signal to a hardware register REG. The RHG signals are also supplied to the separate store. The backup processor periodically scans the store for transferring the IAR and the E- word decode signals into the trace area of the back-up processor, With such information in the trace area, error recovery procedures are facilitated for a system being controlled.

A trace connection is provided between the bus-out of the online processor and the bus-in of the back-up processor. Code in the back-up processor captures the signals on the trace connection. For example, from other back-up processing functions, the back-up processor determines whether or not an E decode has occurred. In such a case, the IAR is stored; and the trace addressed is increased by one. This is done each time a separate store is scanned by the back-up processor. Then, the back-up processor checks for bus tags on the bus- out of the online processor. If any tag is active, then the back-up processor...