Browse Prior Art Database

System to Execute Compacted Programs

IP.com Disclosure Number: IPCOM000082501D
Original Publication Date: 1974-Dec-01
Included in the Prior Art Database: 2005-Feb-28
Document File: 3 page(s) / 45K

Publishing Venue

IBM

Related People

McMahon, RF: AUTHOR [+2]

Abstract

Compacted programs take up less memory space, take less time to move into memory, and take less space in their archival medium (e.g. tape, disk). However, the fact that after compacting, OP codes do not necessarily (and most probably do not) lie on byte boundaries, requires some system modifications.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 53% of the total text.

Page 1 of 3

System to Execute Compacted Programs

Compacted programs take up less memory space, take less time to move into memory, and take less space in their archival medium (e.g. tape, disk). However, the fact that after compacting, OP codes do not necessarily (and most probably do not) lie on byte boundaries, requires some system modifications.

Fig. 1 shows the essential elements of a system that can execute compacted programs. The various elements of this figure are explained below: 1. Normal Program - any operating system, supervisor, problem program, etc., which is to be compacted. 2. Compacted Program - item #1 above after compacting. The subject of variable-length coding based upon frequency of use of the various characters comprising a program is well known. There is however, a program implied between steps 1 and 2. A "COMPACTER" (special purpose assembler) is used to arrive at the compacted form. 3. Branching causes a problem. Because OP codes do not have to reside on byte boundaries when in compacted form, bit addressing is required. This implies two things: - 3 bits (bit addressing) are added to branch addresses. Depending upon system architecture, other instructions with similar addressing requirements would also have the three bits appended. These bits are added by the special purpose assembler described on item #2 above. It is obvious that data can also be compacted. This would have the effect of requiring all addresses to be adjusted for bit addressing. - Hardware is added to the instruction fetch hardware to handle the class of instructions mentioned immediately above. It is understood that this could also be done by microcode.

Fig. 2 shows a Branch instruction at location 0, branching to some address "A". At location "A" there is an ADD instruction. In compacted form, as previously shown, an OP code will most probably not reside on a byte boundary. In Fig. 2, the ADD instruction is shown starting on bit 1 of the byte "A". (Convention: bits in a byte are numbered 0 - 7). This illustrates the need for the three bits added to the address field of the branch instruction residing at byte 0.

The purpose is to provide the I fetch hardw...