Browse Prior Art Database

Noncontact Mask for Chip Terminal Metallurgy

IP.com Disclosure Number: IPCOM000082584D
Original Publication Date: 1975-Jan-01
Included in the Prior Art Database: 2005-Feb-28
Document File: 2 page(s) / 34K

Publishing Venue

IBM

Related People

Simms, F: AUTHOR

Abstract

This semiconductor chip terminal pad deposition mask defines terminal pad areas, while avoiding substantial physical contact with active circuit regions in the central portion of a semiconductor chip.

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Noncontact Mask for Chip Terminal Metallurgy

This semiconductor chip terminal pad deposition mask defines terminal pad areas, while avoiding substantial physical contact with active circuit regions in the central portion of a semiconductor chip.

Semiconductor chips mounted using the controlled collapse or ball limited metallurgy techniques, require deposition of layers of metallurgy only over designated terminal pad areas. Fig. 1 is a partial plan view of a molybdenum mask 10 showing the terminal pad holes 12. Surrounding each hole 12 is a raised standoff pad 14, which allows the main portion of mask 10 to be spaced away from the semiconductor active circuit regions, as shown in Fig. 2. In operation, mask 10 is placed in physical contact with semiconductor chip 16 and pad metallurgy deposition by evaporation, or sputtering is carried out conventionally.

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