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Odd Even Shunt Circuits

IP.com Disclosure Number: IPCOM000082589D
Original Publication Date: 1975-Jan-01
Included in the Prior Art Database: 2005-Feb-28
Document File: 3 page(s) / 79K

Publishing Venue

IBM

Related People

Marcus, MP: AUTHOR

Abstract

ODD circuits and EVEN circuits which satisfy a logic function with an odd or even number of true inputs (e.g., exclusive OR parity checking) are implemented in an efficient manner in CMOS (complementary metal-oxide semiconductor) technology, thereby effecting a significant cost savings over conventional implementation.

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Odd Even Shunt Circuits

ODD circuits and EVEN circuits which satisfy a logic function with an odd or even number of true inputs (e.g., exclusive OR parity checking) are implemented in an efficient manner in CMOS (complementary metal-oxide semiconductor) technology, thereby effecting a significant cost savings over conventional implementation.

Fig. 1 is an implementation of a logic function in shunt CMOS circuitry; in this form, only N-type semiconductor devices are used in the logic (shown enclosed in the dotted rectangle). Another form, shown in Fig. 2, inverts the logic portion, and allows both P and N devices; the P devices perform complementation of the variables.

There is a constraint, however, on the configuration of the P and N devices: a P device may never be "below" an N device in any logic path. This restriction costs somewhat in random logic, but the penalty is most severe in ODD circuits and EVEN circuits, which are among the more common macros.

Using conventional implementation, the number of logic devices needed for an N-way ODD or EVEN circuit is given by 2(2/N/-2/N-2/-1). The following table gives some comparative figures for the conventional implementation vs. the improved implementation herein, in terms of the number of logic devices needed for up to an 8-way circuit. Where two figures are shown in the described implementation, the left one applies to an ODD circuit and the right one to an EVEN circuit.

In Figs. 3 through 7, a complemented variable represents a P device, and an uncomplemented variable represents an N device.

Figs. 3 and 4a show the conventional 2-way configurations. Fig. 4b shows an alternate configuration for the 2-way ODD circuit; this alternate configuration is pertinent to the improved ODD/EVEN circuit implementation.

The second pertinent point i...