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Photolithographic Pattern Size Monitor

IP.com Disclosure Number: IPCOM000082616D
Original Publication Date: 1975-Jan-01
Included in the Prior Art Database: 2005-Feb-28
Document File: 2 page(s) / 42K

Publishing Venue

IBM

Related People

Stevens, RC: AUTHOR

Abstract

The designs for semiconductor devices are implemented by etching patterns in oxides. Control of the size of these patterns is directly related to the device's performance and yield. The original design may pass through several intermediate steps before product completion such as unit segments, master plates, working plates, photoresist patterns and the final product patterns. Pattern size, to be controlled, must be measured, normally with a calibrated microscope in a time-consuming manner.

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Photolithographic Pattern Size Monitor

The designs for semiconductor devices are implemented by etching patterns in oxides. Control of the size of these patterns is directly related to the device's performance and yield. The original design may pass through several intermediate steps before product completion such as unit segments, master plates, working plates, photoresist patterns and the final product patterns. Pattern size, to be controlled, must be measured, normally with a calibrated microscope in a time-consuming manner.

The following pattern may be placed in the original design to permit a visual measure of pattern size deviation from nominal. The individual patterns are positioned so that the left side of a pattern 1 may be compared to the right side of a pattern 2. As the images shrink or expand, each pattern center remains fixed and the original relationship changes; a different set of left and right images become most nearly coincident 3, 4 and 5,6. The patterns are positioned to become coincident at any particular amount of deviation desired. No measuring instruments are needed and there is no need for the inspector to know the nominal size of the pattern.

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