Browse Prior Art Database

High Temperature Thermal Oxide Susceptor

IP.com Disclosure Number: IPCOM000082636D
Original Publication Date: 1975-Jan-01
Included in the Prior Art Database: 2005-Feb-28
Document File: 2 page(s) / 28K

Publishing Venue

IBM

Related People

Deines, JL: AUTHOR [+3]

Abstract

This thermal oxide susceptor creates a ""radiation cavity'' that permits high-temperature operation in oxidizing ambients. The assembly allows thermal oxide growths, diffusions from doped oxides, and diffusion drive-in cycles in a single reaction chamber. In addition, this susceptor permits lower power consumption, good oxide thickness uniformity, and elimination of thermally induced wafer slip.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 98% of the total text.

Page 1 of 2

High Temperature Thermal Oxide Susceptor

This thermal oxide susceptor creates a ""radiation cavity'' that permits high- temperature operation in oxidizing ambients. The assembly allows thermal oxide growths, diffusions from doped oxides, and diffusion drive-in cycles in a single reaction chamber. In addition, this susceptor permits lower power consumption, good oxide thickness uniformity, and elimination of thermally induced wafer slip.

Fig. 1 shows the thermal oxide susceptor 3 positioned in a reactor 5 on a quartz sled 7. The susceptor (with wafer 13) is a two-tiered assembly made from one-quarter inch silicon plates or slabs with parallel surfaces 9. Slab 2 sits on silicon spacers 11 above slab 1. During radiant heating, radiation is transmitted through the quartz sled to silicon slab 1. Slab 1 then radiates and conducts the heat to slab 2. At the appropriate machine setting, the wafer's temperature in region 1 can vary between 1000 degrees C and 1100 degrees C.

In region 2, where silicon slab 2 is spaced above silicon slab 1, the wafer temperature is 80 degrees C to 100 degrees C higher than region 1. The staggering of silicon slabs as in Fig. 1 is optional. However, there are two advantages in staggering: two or more temperature hot zones in the reactor are possible, and the wafer can oxidize at two different temperature (permitting two different oxide growth rates) with a dual oxidation-oxidizing drive-in heat cycle.

1

Page 2 of 2

2

[This page contains 2 pi...