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Browse Prior Art Database

Positive Voltage Translation Circuit

IP.com Disclosure Number: IPCOM000082679D
Original Publication Date: 1975-Jan-01
Included in the Prior Art Database: 2005-Feb-28
Document File: 2 page(s) / 34K

Publishing Venue

IBM

Related People

Hoffman, CR: AUTHOR

Abstract

In the design of linear and special circuits in metal-oxide semiconductor field-effect transistor (MOSFET) technology, it is often desirable to be able to add a positive increment to an input voltage for changing from one logic family to another, for compensating for circuit losses in analog circuits, or to maintain a voltage reference. An on-chip circuit for such voltage translation is needed for convenience and cost reduction and such a circuit is shown.

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Positive Voltage Translation Circuit

In the design of linear and special circuits in metal-oxide semiconductor field- effect transistor (MOSFET) technology, it is often desirable to be able to add a positive increment to an input voltage for changing from one logic family to another, for compensating for circuit losses in analog circuits, or to maintain a voltage reference. An on-chip circuit for such voltage translation is needed for convenience and cost reduction and such a circuit is shown.

In the drawing, a chip substrate 1 has a conductor 2 carrying a drain voltage Vo and a grounded conductor 3. Two FET depletion mode transistors 4 and 5 are shown with each having a doped drain area 6, a doped source area 7 and a conductive path 8 between each source 7 and its associated drain 6. A gate metalization 9 covers each conductive path 8 and is insulated therefrom by a layer of oxide grown from the substrate 1.

Transistor 4 has its drain 6 connected to the conductor 2, its gate 9 connected by a conductor 10 to an external control voltage Vin, and its source 7 connected to the drain 6 of transistor 5 and to an output conductor 11 which will carry the generated voltage Vout. The gate 8 and source 7 of transistor 5 are both connected to the ground conductor 3.

With such connections it can be shown that Vo = Vin + (GVt5-Vt4) where: Vt is the threshold voltage of a transistor and G is a shape factor, specifically the ratio of the square root of the width divided by leng...