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Multiple Selection Detector

IP.com Disclosure Number: IPCOM000082698D
Original Publication Date: 1975-Jan-01
Included in the Prior Art Database: 2005-Feb-28
Document File: 2 page(s) / 39K

Publishing Venue

IBM

Related People

Zimmerman, DJ: AUTHOR

Abstract

For many circuits, such as decoders for example, there should only be one active input at any given time. A multiple selection detector serves to determine whether there are undesirable multiple inputs that are active, when only one out of a given number should be active.

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Multiple Selection Detector

For many circuits, such as decoders for example, there should only be one active input at any given time. A multiple selection detector serves to determine whether there are undesirable multiple inputs that are active, when only one out of a given number should be active.

If 8 bits are being processed at the input of a circuit, each bit is compared against all other bits in a binary fashion. If two or more bits are ON or active, that is, at a negative level in this particular case, two input signals entering any OR gate 10, 12, 14, 16, 18 or 20 will activate an AND circuit 22, 24, or 26, which will be positive. The activated AND circuit will provide an error output signal that will pass through the OR circuit 28 to indicate that a multiple selection of active bits has been made, and that an error exists.

On the other hand, an error indicating that none of the bits are active or that there has been no selection may be obtained by a similar circuit, which adds an 8-way AND circuit, with -bit 1 through -bit 8 as inputs. In this case, an output is provided to the output OR circuit 28, and a no-selection error may be detected.

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