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Exclusive OR Gate

IP.com Disclosure Number: IPCOM000082902D
Original Publication Date: 1975-Feb-01
Included in the Prior Art Database: 2005-Feb-28
Document File: 2 page(s) / 25K

Publishing Venue

IBM

Related People

Yao, YL: AUTHOR

Abstract

In the figure, J1, J2, J3 and J4 are identical Josephson junction devices connected in series. These devices pass a current Ig from a current source, not shown. Devices J1 and J2 are each shunted by resistors R1,R2, respectively. A point between devices J1,J2 and a point between resistors R1,R2 are interconnected by interconnection CC'. The latter acts as a control line for devices J3,J4 which are, in turn, shunted by an output resistance, Ro.

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Exclusive OR Gate

In the figure, J1, J2, J3 and J4 are identical Josephson junction devices connected in series. These devices pass a current Ig from a current source, not shown. Devices J1 and J2 are each shunted by resistors R1,R2, respectively. A point between devices J1,J2 and a point between resistors R1,R2 are interconnected by interconnection CC'. The latter acts as a control line for devices J3,J4 which are, in turn, shunted by an output resistance, Ro.

Devices J3,J4 are arranged such that current flow in branch CC', depending on its direction, actuates one or the other of devices J3,J4. Current in branch CC' only exists when either input A or input B is present but not both. Thus, when input A is present, device J1 is switched causing current Ig to be diverted through resistor R1, branch C'C, J2 and Ro. Current flow in branch C'C switches either J3 or J4 causing current Ig to flow through resistor Ro.

When input B is present device J2 switches, diverting current Ig, which has passed through unswitched device J1, to branch CC', resistor R2 and output resistor Ro. In this instance, current flow through branch CC', which is in a direction opposite to that when input A is present, causes the other of devices J3,J4 to switch, thereby diverting current Ig into output resistor Ro. Consequently, an output current in branch CC' is sensed by devices J3 and J4 regardless of the direction of that current, and the exclusive OR output, I(out) = AB + AB is provided.

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