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Method and Apparatus of Diagnosing Logic Built-In Self Test Failures Using Light Emission

IP.com Disclosure Number: IPCOM000082910D
Original Publication Date: 2005-Feb-28
Included in the Prior Art Database: 2005-Feb-28

Publishing Venue

IBM

Abstract

This disclosure addresses the problem of diagnosing these complex designs by combining the LBIST design concepts with emission-based diagnostic method. Specifically, the problem solved is that of using LBIST test and light emission due to leakage current based diagnostic technique to isolate fault.

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Method and Apparatus of Diagnosing Logic Built -In Self Test Failures Using Light Emission

The rapid advance of VLSI devices, associated with high speed circuit performance, and relatively short time-to-market, has driven the need to rapidly characterize and diagnose complex designs early in the product cycle. Currently, conventional characterization test tools and diagnostic techniques, already somewhat limited, are quickly becoming obsolete. These problems in turn surface the need for a novel test and diagnostic methodology that combines new Physical Failure Analysis (PFA) tools with integrated test & diagnostics support built-in the semiconductor device. Some of the built-in test and diagnostic functions may be based on several Design for Test (DFT) techniques such as Scan design (LSSD, GSD), Logic Built-in-self-test (LBIST) and others.

     Emission-based diagnostic methods have been developed in recent years. Most of these methods are based on optical access from the backside of the wafer/chip because the dense back-end-of-line structures and flip-chip packaging obstruct signal lines and active devices, making conventional testing techniques impractical.

     This disclosure addresses the problem of diagnosing these complex designs by combining the LBIST design concepts with emission-based diagnostic method. Specifically, the problem solved is that of using LBIST test and light emission due to leakage current based diagnostic technique to isolate fault.

     The concept is based on the LBIST test methodology and a light emission due to leakage current based diagnostic technique to isolate faults. Execute LBIST test sequence.

Identify failing test loop(s)

Isolate the failing Representative Measurable Latches (RML)s for each identified failing tester loop. Trace back to the Representative Stimulating Latches (RSL)s from RMLs.

Identify a control latch (RSL) that can change the chip from fail to pass.

At the failing condition, take emission imagine by freezing the RML values.

At the passing condition, take emission imagine by freezing the RML values.

Compare the emission imagines at both failing and passing conditions to localize the failing gates.

     BIST - Before describing the new light emission due to leakage current Based LBIST Diagnostic Method, several DFT and BIST overview sections are included. The first section describes the basic pseudo random pattern generation techniques using Linear Feedback Shift Registers (LFSRs), while the second section further describes the use of the LFSR configured as a Multiple Input Signature Register (MISR) or Single Input Signature Register (SISR) to compress data and generate signatures. The next three sections of the background address logic scan design and test methodology and LBIST and ABIST techniques. The PICA background sections in conjunction with the associated drawings give a brief overview of the basic physics concept and instrumentation. Additional background detail information can be obtained...