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Browse Prior Art Database

High Speed FET Decoder Circuit

IP.com Disclosure Number: IPCOM000082929D
Original Publication Date: 1975-Mar-01
Included in the Prior Art Database: 2005-Feb-28
Document File: 2 page(s) / 26K

Publishing Venue

IBM

Related People

DeSimone, RR: AUTHOR

Abstract

This field-effect transistor (FET) decoder circuit provides a high speed, uniform discharge of all unselected decoder circuits which is virtually independent of the number of transistors 10 turned on in each decoder circuit, by decoding or address signals applied to terminals 12. These transistors 10 may be minimum size devices.

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High Speed FET Decoder Circuit

This field-effect transistor (FET) decoder circuit provides a high speed, uniform discharge of all unselected decoder circuits which is virtually independent of the number of transistors 10 turned on in each decoder circuit, by decoding or address signals applied to terminals 12. These transistors 10 may be minimum size devices.

A pulse R is applied to the gate of transistor 14 to charge node A to a given value. The charge on node A turns on transistor 16 which discharges node B to ground. Decode or address signals are then applied to terminals 12. If these signals turn on one or more transistors 10, node A begins to discharge through the turned on transistors 10 and the voltage at node B begins to increase as transistor 16 begins to turn off.

When node B reaches the threshold voltage of transistor 18, transistor 18 turns on, further discharging node A. This action continues until the latch formed by transistors 16 and 18 changes state, to completely discharge node A through transistor 18. Thus, node A is discharged primarily through transistor 18 of the latch, rather than through one or more of the minimum size transistors 10.

Standby power dissipation can be minimized at the optimum stability operating point of the latch, or by applying an appropriate pulse P to transistor
20.

If the decoder is selected none of the transistors 10 is turned on. Node A remains charged to turn on output transistor 22 when a delayed chip select pulse ...