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Integrated Resistor Trimming

IP.com Disclosure Number: IPCOM000082953D
Original Publication Date: 1975-Mar-01
Included in the Prior Art Database: 2005-Feb-28
Document File: 2 page(s) / 41K

Publishing Venue

IBM

Related People

Parisi, JA: AUTHOR

Abstract

Monolithic integrated circuits exhibit large resistor value variations due to: process variations; photolithographic masking tolerances; and variations in diffusion depth, temperature, and time. In order to obtain minimum resistor value variations, the resistor is made very large, reducing the photolithographic masking tolerance and creating silicon area penalties.

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Integrated Resistor Trimming

Monolithic integrated circuits exhibit large resistor value variations due to: process variations; photolithographic masking tolerances; and variations in diffusion depth, temperature, and time. In order to obtain minimum resistor value variations, the resistor is made very large, reducing the photolithographic masking tolerance and creating silicon area penalties.

Fig. 1 shows a resistor 4, as it is presently manufactured on a substrate 6 with metal contacts 8.

Fig. 2 shows a method of increasing the resistance of the resistor 4 by using a laser beam 10 to trim the resistor and thus control the resistor tolerance. The laser beam 10 is directed at the resistor 4, creating small craters 12 in the resistor, thus increasing the resistor value. The resistor value can be controlled by the number of craters 12 and/or by the number of consecutive laser pulses applied to one location. Four advantages to laser resistor trimming are that it: 1) Allows wider process variations to obtain equal resistor values; 2) Obtains better tracking between two resistors; 3) Reduces power on the chip (due to high- resistor values); and 4) Saves Si area by using smaller resistor areas with resistors that are trimmed to their final value.

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