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Clock Pulse Generator With Adjustment for Cycle Length

IP.com Disclosure Number: IPCOM000083012D
Original Publication Date: 1975-Mar-01
Included in the Prior Art Database: 2005-Feb-28
Document File: 2 page(s) / 27K

Publishing Venue

IBM

Related People

Stuebner, FE: AUTHOR

Abstract

An oscillator 2 provides a sequence of pulses that time the operations that occur during a machine cycle. This clock is particularly useful for testing machines of various cycle lengths that may not be an integral multiple of the oscillator period.

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Clock Pulse Generator With Adjustment for Cycle Length

An oscillator 2 provides a sequence of pulses that time the operations that occur during a machine cycle. This clock is particularly useful for testing machines of various cycle lengths that may not be an integral multiple of the oscillator period.

The output of oscillator 2 is applied to a phase-shift circuit 3 that produces eight phase-shifted outputs that differ progressively in phase by a fixed amount. A circuit 4 responds to a three-bit code on a bus 5 to select one of these eight outputs for timing a machine cycle. A register 6 supplies the three-bit code on bus 5. For example, if the oscillator period is eight nanoseconds, the eight outputs of phase shifter 3 differ in increments of one nanosecond. Suppose that the input on bus 5 changes on each machine cycle to select the third next output of circuit 3 for the next machine cycle.

The length of the machine cycle would be a multiple of eight (the oscillator period) plus three nanoseconds. The three nanosecond interval occurs at the end of each machine cycle, when the output is shifted from one phase to a phase that is delayed by three nanoseconds.

A register 7 holds the value of the change that is to be made in register 6 for each cycle. In the example of the last paragraph this value is three. An arithmetic unit 8 receives the values in registers 6 and 7 and computes the next value for register 6. This new value is set into register 6 in response to a...