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Parallel Josephson Tunneling Device Shift Register

IP.com Disclosure Number: IPCOM000083062D
Original Publication Date: 1975-Mar-01
Included in the Prior Art Database: 2005-Feb-28
Document File: 2 page(s) / 34K

Publishing Venue

IBM

Related People

Matisoo, J: AUTHOR [+2]

Abstract

It is known that a flip-flop circuit can be formed using two Josephson tunneling devices (JTD's) connected in parallel, as shown in Fig. 1.

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Parallel Josephson Tunneling Device Shift Register

It is known that a flip-flop circuit can be formed using two Josephson tunneling devices (JTD's) connected in parallel, as shown in Fig. 1.

Using this basic building block, a two-phase shift register configuration can be designed as shown in Fig. 2. In general, any multiphase configuration shift register can be worked out easily with minor modifications.

The operation of the shift register is as follows:

Input currents i1 and i1 are complementary to each other and they are applied to Josephson devices Q1 and Q2, respectively, of circuit 1. The output currents of circuit 1, i2 and i2, are complementary and are applied to Q3 and Q4, respectively, of circuit 2.

Clock waveforms CP1 and CP2 shown in Fig. 3 are time orthogonal pulses Assuming input i1 is present (i.e. i1=0), when CP1 is applied, the combined magnetic field due to currents CP1 and i1 switches Q1 momentarily to the normal state, causing the gate supply current I(g) to flow into the branch of Q2. The current state of both Q1 and Q2 will not change even after CP1 returns to zero, as long as I(g) remains constant.

During CP2, i2 (which is present because Q1 switched and Q2 did not) and CP2 cause Q3 to switch (i.e., from pair-tunneling to single-particle tunneling, if it was not originally in this state). This causes the gate current, I(g), to flow in Q4.

Fig. 2 is shown with a connection which does not cause logic inversion. If both i1,i1 and i2,i2 are inte...