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Absolute Incremental Closed Loop Motor Controller

IP.com Disclosure Number: IPCOM000083105D
Original Publication Date: 1975-Apr-01
Included in the Prior Art Database: 2005-Feb-28
Document File: 3 page(s) / 83K

Publishing Venue

IBM

Related People

Davies, PJ: AUTHOR

Abstract

An absolute/incremental closed-loop step motor controller is shown in Fig. 1. It comprises a 50-turn encoder 10 which is adapted to provide 200 bit increments for each 360 degrees rotation. The output is a 16 bit BCD number which varies from 0 to 10,000 in decimal value. Thus, the lowest 4-bit positions of the 16 bits represents the unit's decimal position. The next 4 bits represents the tens decimal position, the next 4 bits the 100's decimal position, and the next 4 bits the 1000's decimal position. Within each four bits there are the 1, 2, 4 and 8-bit positions.

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Absolute Incremental Closed Loop Motor Controller

An absolute/incremental closed-loop step motor controller is shown in Fig. 1. It comprises a 50-turn encoder 10 which is adapted to provide 200 bit increments for each 360 degrees rotation. The output is a 16 bit BCD number which varies from 0 to 10,000 in decimal value. Thus, the lowest 4-bit positions of the 16 bits represents the unit's decimal position. The next 4 bits represents the tens decimal position, the next 4 bits the 100's decimal position, and the next 4 bits the 1000's decimal position. Within each four bits there are the 1, 2, 4 and 8-bit positions.

The 16-bit output from the encoder is supplied to a 16-bit storage device 11, which can be set to any particular 16-bit value. The output of this device is supplied to a comparator 12 which also receives the 16 bits from the encoder 10.

If it is desired to have an absolute zero position, then the set storage input would be all 0's and the devices 11 and 12 would, in effect, be transparent. However, it is possible to provide a different zero position by the value placed in the set storage. In that event, the set value placed in the 16-bit storage becomes the "zero" position. The output of the comparator 12 is supplied to a comparator 13 which also receives a 16-bit input signal from the data source.

Each of comparators 12 and 13 are in the form of binary coded decimal (BCD) subtractors, the latter of which is capable of providing several outputs to a winding sequence circuit 14 as shown in Fig. 1. The "stop" output indicates that the difference between the 16-bit input from the data source and the position of the shaft about its zero point is 0. There is also an input to the winding sequence circuit which indicates whether the difference is plus or minus. Further, there is an input to the winding sequence circuit which indicates that the difference is of such magnitude, as to make it desirable to operate at a high speed.

The winding sequence circuit 14 also receives a 4-bit input from a step sequence circuit 15, which receives a 3-bit signal from encoder 10. That is, 3 bits representing the decimal values of 1, 2 and 10 are used. The purpose of decoding logic 15 is to...