Browse Prior Art Database

Dynamic Schottky Storage Cell

IP.com Disclosure Number: IPCOM000083138D
Original Publication Date: 1975-Apr-01
Included in the Prior Art Database: 2005-Mar-01
Document File: 2 page(s) / 35K

Publishing Venue

IBM

Related People

Landler, PF: AUTHOR

Abstract

Described is a semiconductor structure utilizing double-level metal and anodization of the metal to provide a capacitor, a standard PN junction together with a Schottky diode, so as to create a memory storage cell. This structure is shown in Fig. 1 and its equivalent circuit shown in Fig. 2.

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Dynamic Schottky Storage Cell

Described is a semiconductor structure utilizing double-level metal and anodization of the metal to provide a capacitor, a standard PN junction together with a Schottky diode, so as to create a memory storage cell. This structure is shown in Fig. 1 and its equivalent circuit shown in Fig. 2.

As shown in Figs. 1 and 2, the cell is formed of a P-type substrate 10 provided with a pair of mesa 11 and 12 surrounded by recessed oxide 13. Mesa 11 is provided with an N+ diffusion 14 on its uppermost surface to form diode 15, shown in Fig. 2. Mesa 12 is provided with a buried N+ diffusion 16, which serves as bit line 17, covered by an N- diffusion 18 which together with a first layer of metal 20 forms Schottky diode 19.

A first layer of metal 20 is deposited so as to cover the contact regions 14 and 18 and serves as one plate of capacitor 21. This layer 20 is preferably coated with an insulator 22 such as Al(2)O(3). Over this insulator 22 is deposited a second layer of metal 23, which functions as the second plate of capacitor 21 and as a word line.

The cell operates as follows. Information is stored in the oxide capacitor 21 formed between the metallic layers 20 and 23. In standby condition the plate 20 of capacitor 21 is, for example, at -4.5 volts for a 1 signal and at 0 volt for a 0 signal. To erase a cell the word line 23 is pulsed to about -5.3 volts setting the cell to a 0. A 0 can be written in the cell by first raising bit line 17 to...