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Method for an enhanced thermal solution for chip-scale packages using thin-film thermoelectric cooling technology

IP.com Disclosure Number: IPCOM000083144D
Publication Date: 2005-Mar-01
Document File: 3 page(s) / 153K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for an enhanced thermal solution for chip-scale packages using thin-film thermoelectric cooling technology. Benefits include improved functionality, improved performance, and improved reliability.

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Method for an enhanced thermal solution for chip-scale packages using thin-film thermoelectric cooling technology

Disclosed is a method for an enhanced thermal solution for chip-scale packages using thin-film thermoelectric cooling technology. Benefits include improved functionality, improved performance, and improved reliability.

Background

      As dice increase in quantity, functionality and power, the die junction temperature in chip-scale packages continues to rise. The current power is limited by the power dissipation of the package and raises the reliability risk for the component. Future products are expected to exceed the operating temperature, which necessitates a thermal management solution.

              Conventionally, the power of the die in packages used in tiny enclosures like cell phone and PDA casings is dissipated through the substrate to the printed circuit board (PCB) and cooled by natural convection only. Typically, the heated die is completely surrounded by low-thermal-conductivity materials, such as the substrate, die-attach adhesive, and molding compound. They restrict the dissipation of heat from the die (see Figure 1).

              Thermoelectric technology has conventionally been applied to many commercial applications in recent decades. Thermoelectric coolers (TECs) are solid state technology, which has no moving parts. As a result, it is considered highly reliable from a mechanical point of view.

General description

              The disclosed method is a thin-film thermoelectric cooler (TFTEC) for lowering the die junction temperature and increasing the power dissipation capability in a molded chip-scale package. A TFTEC is attached directly to the die or to the substrate directly under the die and becomes an integral part of the package. The cold side of the TFTEC suppresses the die temperature or the substrate temperature directly under the die to increase the...